VLSI Design / Advanced VLSI Design: Introduction to VLSI Design

Installation of TSMC 180 nm Technology Files in LT SPICE an NMOS & PMOS Characterization

Advanced VLSI Design: Latch and Flip-flops

Impementaion of SR Latch, D-Latch and D Flip-flop using 180 nm TSMC CMOS devices in LT SPICE.

Advanced VLSI Design: Dynamic Registers

Advanced VLSI Design: Pipelined Registers

Advanced VLSI Design: Static Timing Analysis

Advanced VLSI Design: Clock Generation and Distribution Part-1

Advanced VLSI Design: Clock Generation and Distribution Part-2

Advanced VLSI Design: Latch Based Clocking & Asynchronous Clocking

Advanced VLSI Design: Interfacing Circuits – Part-1 Synchronizer and Arbiters

Advanced VLSI Design: Interfacing Circuits – Part-2, Schmitt Triggers

Advanced VLSI Design: Interfacing Circuits – Part-3 Level Shifters and IO PADS

Advanced VLSI Design: Arithmetic Circuits: Part-1

Advanced VLSI Design: Arithmetic Circuits: Part-2

Advanced VLSI Design: Memory Design

Advanced VLSI Design: Low Power VLSI Design Part-2: Architecture, Algorithmic Optimization

Advanced VLSI Design: Interconnects

Advanced VLSI Design: Adiabatic Logic

Advanced VLSI Design : Deep-Submicron MOSFET operation

Advanced VLSI Design : CMOS Scaling

Advanced VLSI Design: Pipelined Registers

Advanced VLSI Design: Static Timing Analysis

Advanced VLSI Design: Logic Families Other than CMOS

Advanced VLSI Design: Arithmetic Circuits: Part-1

Advanced VLSI Design: Arithmetic Circuits: Part-2

Advanced VLSI Design: 2023-24 Lecture 5 Static Timing Analysis

Lecture 14 Combinational Components